Design Verification Engineer

Infrastructure | Menlo Park, CA - Redmond, WA

As a Digital Design and Digital Verification Engineer at Oculus, you will work with a world-class group of researchers and engineers, and use your digital design and verification skills to contribute to development and optimization of state-of-the-art vision and sensing algorithms and design and implement the testing infrastructure to validate these new core IP implementations. You will work closely with researchers, architects and designers leading and defining verification methodologies, infrastructure requirements, test bench requirements and test cases for multiple state of the art IPs.

Responsibilities

  • Work with researchers and architects in algorithm analysis, optimization and identification of optimal digital µArchitectures for their implementation
  • Implement and verify optimal design modules leading to FPGA emulation and ASIC implementation
  • Work with researchers and architects defining verification methodologies for each
  • Support or lead defining the Oculus DV infrastructure and DV architecture of the different core IPs
  • Define and track detailed test plans for the different modules and top levels
  • Implement scalable test benches including checkers, reference models, and coverage groups in SystemVerilog
  • Keep track of coverage metrics and bugs encountered and fixed
  • Implement self-testing directed and random tests
  • Develop the scripts and code necessary for proper automation
  • Architect and implement a regression system
  • Lead debugging and runtime optimization efforts
  • Support post silicon bring up and debug activities

Minimum Qualifications

  • BS in EE, CS or equivalent experience
  • 5+ years of industry experience in Digital Design
  • 5+ years of industry experience in System Verilog OVM/UVM DV
  • Knowledge of clock management, clock domain crossing and reset architectures
  • Knowledge of ASIC/FPGA design methodologies
  • Knowledge of digital ASIC architecture and µArchitecture
  • Knowledge of Python, Perl, shell scripting
  • Experience with assertions (SVA) or others
  • C, C++ coding, debugging experience

Preferred Qualifications

  • Experience with low power design
  • FPGA implementation and debug experience
  • Lab bring up and lab instrument operation experience
  • Palladium or other emulation platform experience


Ready to Join?

Apply Now

Oculus is proud to be an Equal Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law.

If you need assistance or an accommodation due to a disability, you may contact us at accommodations-ext@fb.com or you may call us at +1 650-308-7837.